Clarycon News Archive: Toshiba
Toshiba introduces at the VLSI symposium a new 3D memory cell array structure using "through-holes" that could be a potential candidate for higher-density NAND flash devices. The new structure uses pillars of stacked memory elements that pass vertically through multistacked layers of electrode material, and which share peripheral circuits. The process involves driving through-holes down through a stacked substrate of gate electrodes and insulator films; filling the holes with pillars of lightly-doped silicon; and the gate electrode wraps around the silicon pillars at even intervals. More ...
Toshiba and Xilinx announce a strategic foundry relationship under which Toshiba will manufacture Xilinx high-performance field programmable gate array (FPGA) products. Together, the companies have already demonstrated the successful output of functional 90 nm first silicon at Toshiba's state-of-the-art 300-mm-wafer manufacturing plant at Oita, in Kyushu, Japan. Toshiba will start volume manufacturing in the first quarter of calendar year 2005. Source: www.xilinx.com
Toshiba Corporation annouces at the VLSI symposium in Kyoto that it has developed and verified the operability of the world's first memory cell technology for embedded DRAM system LSIs on silicon-on-insulator (SOI) wafers. Toshiba targets to apply the new technology to mass production of system LSIs for broadband network applications in 2006. Toshiba has experimentally fabricated a 96kbit cell array and verified the practical operability of the advanced cell structure with sufficient characteristics required for embedded DRAM system LSIs on SOI. Source: '
Toshiba announces a CMOS transistor with HfSiON gate dielectric for the 65 nm node which is slated to go into mass production in 2005. Source: '