Plasma Technology for Advanced Devices
Volume 3: December 2002
Modeling of Plasma Etching
“Surface Chemistry Associated with Plasma Etching Processes”
This paper reports on molecular dynamics (MD) simulations of the interaction of energetic argon ions with silicon surfaces with and without F coverage. The results are compared to the impact of F+ and SiF3+ ions. As one would expect, the simulations show that Ar+ bombardment induces intense mixing. The thickness of the amorphous layer depends on the ion energy (2┼ for 20 eV and 15┼ for 200 eV) and it is possible to reverse the damage by gradually decreasing the ion energy. While silicon atoms mix efficiently into the amorphous layer (less efficiently into the crystalline sublayer), F atoms remain on the surface. This has been observed for adsorbed F atoms a well as impinging F+ and SiF3+ ions. The result of the resistance to mixing is a rougher surface which seems to be reduced in the presence of carbon.
“Surface molecular dynamics of Si/SiO2 reactive ion etching”
Classical molecular dynamics (MD) simulations of Si and SiO2 etching by Cl and F have been performed. The interatomic potentials for Si-O-Cl and Si-O-F were constructed based on ab initio quantum mechanical simulations. The Si surface for 50 eV F ion beam etching was found to be much rougher than for 50 eV Ar ion beam etching in the presence of low energy F species (RIE regime). This is explained by the termination of dangling bonds by low energy F atoms in the RIE regime. The authors conclude that RIE is intrinsically better suited for low damage etching with high controllability of the film thickness than ion beam etching.
“Development of optical computerized tomography in capacitively coupled plasmas and inductively coupled plasmas for plasma etching”
This paper is a very detailed review of the results of optical emission spectroscopy in the diagnostics of radio frequency discharges over the last 15 years. 119 references are cited!
“Characteristics and Device Design of Sub-100 nm strained Si N- and PMOSFET’s”
Current drive enhancements were demonstrated in the strained-Si PMOSFET’s with sub-100 nm physical length for the first time, as well as in the NMOSFET’s with well controlled Vt and Con characteristics for Lpoly and Leff below 80 nm and 60 nm. A 110 % enhancement in the electron mobility was observed in the strained Si devices with 1.2 % tensile strain (28 % Ge content in the relaxed SiGe buffer), along with a 45 % increase in the peak hole mobility. When reacted with cobalt, SiGe inhibits cobalt silicide transition to the low resistivity disilicide phase, resulting in a high salicide sheet resistance. Therefore, a raised source / drain (RSD) process was developed to optimize the salicide resistance.
“Hot-Carrier Charge Trapping and Reliability in high-k Dielectrics”
This paper reports for the first time on hot-electron and hot-hole trapping in HfO2 pFETs/nFETs and Al2O3 nFETs. The authors conclude that the hot-carrier effect is an important issue for high-k devices under the condtions where hot holes are readily available. For pFETs this condition may occur under normal biasing while for nFETs hot-electron degradation may depend critically on the supply of hot holes.
“A Status Report on Technology for Carbon Nanotube Devices”
Recent developments in carbon nanotube technology hold promise for some preliminary fabrication methods to realize the first level of nanotube-based microelectronics. The authors provide an overview about the prospects and challenges in utilizing carbon nanotubes (CNT) in microelectronics. They predict that CNT will strongly compete with silicon circuits on the nanometer scale.
Photoresists / Plasma Interaction with Photoresists
“The Preparation Method of ULSI Sample with Photoresist for TEM Analysis”
While the resist profiles become more and more critical for ion implantation and CD control in plasma etching, the analysis of the profile of advanced ArF and F2 resists is very difficult to obtain. This paper reports on a technique that employs low energy metal sputtering at room temperature followed by a 50 nm thick oxide layer deposited at room temperature (Gatan DuoMiller). The samples were prepared by FIB.
“The Frog Prince – A Brief Review of DUV Resist Technology”
A very good review of the different materials (polymer selection, base and additive selection, photoresist processing) and DUV resist prospects and issues (line edge roughness, pattern collapse, defectivity, thermal flow). The authors state that contrary to previous predictions, DUV has become the technology of choice for the 130 nm technology node, and it seems likely that bth DUV and 193 nm lithography will coexist for the manufacturing of sub 100 nm design rules.