Plasma Technology for Advanced Devices

Clarycon News Archive: AMD

Douglas Grose, newly appointed senior vice president of technology development, manufacturing and supply chain said in an interview with Reuters that high k / metal gates are on the AMD roadmap for the late 45nm or early 32nm nodes. 45nm is ".. much on or ahead of (the) schedule right now," Grose said. "We'll be producing early products probably in Q2 of 2008, with full production in the second half."

AMD has begins to ship processors made using 90-nanometer manufacturing processes to notebook customers. Source: Silicon Strategies

AMD announces that its solution for the 45nm node will be a three-gate transistor design, which it discussed at this year's IEEE International Electron Devices Meeting, held in Washington, DC. AMD also re-iterated its belief that silicon-on-insulator technology remains the best foundation for today's chips - and tomorrow's. They will use metal gates but not high k dielectrics. Source:
The Register

Advanced Micro Devices announces at the International Conference on Solid State Devices and Materials technology that it will move to the 45 nm technology node ahead of the International Technology Roadmap for Semiconductors (ITRS). Aiming at 2007 instead of ITRS' 2009, AMD researchers provide details on new triple-gate transistors, based on industry-friendly next-generation silicon-on-insulator (SOI) and advanced metal gate technologies. Source: Electronic News

AMD announces that it will unveil two new transistors in June at the VLSI symposium. The first transistor is a fully depleted PMOS which AMD claims is 30 % faster than the best published PMOS. The second transistor combines strained silicon and metal as the gate material with a 20 to 25 % performance increase over non-metal strained silicon transistors. Source: '

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